THE PACKAGING TECHNOLOGIES BEHIND NVIDIA''S 3D

3D Packaging of Optical Modules

3D Packaging of Optical Modules

5D interposers, Through-Silicon Vias (TSVs), fan-out wafer-level packaging (FOWLP), and, increasingly, 3D integration with hybrid bonding. Source: IDTechExThe concept of Free Space Microoptical Coupling (FSMOC), realized with 3D-printed microoptical elements precisely 3D-aligned on the facet of optical fibers or on photonic chips, provides a robust and efficient solution for coupling light into photonic chips or to other fiber arrays. Innovative solutions such as 3D packaging of optoelectronic ICs and CPOs offer the promise of significant improvements in cost efficiency and power consumption. However, these advancements come with challenges, including the need for new and intricate packaging, thermal management, and optical. At GTC 2025, NVIDIA announced two new networking switch platforms - Spectrum-X Photonics and Quantum-X Photonics - based on Co-Packaged Optics (CPO) technology. Spectrum-X, targeting Ethernet-based architectures, will be released in 2026 and offers configurations ranging from 128 ports at 800 Gb/s. Scaling is key because with each chip generation – whether an AI accelerator or a switch chip – the input-output (I/O) requirements grow. Collaboration to incorporate 3D-lithography technology into POET's Optical InterposerTM platform. Driven by the demands of artificial intelligence (AI) and high-performance computing (HPC), a critical convergence is taking place across three critical domains: Advanced semiconductor packaging, photonics, and networking.

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Fixing wire clips at the bottom of the distribution box

Fixing wire clips at the bottom of the distribution box

For plastic boxes, press down on the Box Doctor® clip aligning the center slot over the damaged hole. Disordered wires and improper fixing in plastic distribution box junction boxes are common causes of poor contact and short circuits. Switchgear cable clamps are used to secure single high and low voltage cables and also to fasten cables made of polyethylene Insulated cables ensure the stability of the cable on a flat surface or on a triangular iron.

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What to do if the bottom of the network cabinet is loose

What to do if the bottom of the network cabinet is loose

Any way you can run the cables through the wall from the networking cabinet into the main cabinet to the right, and store all of your networking gear in there? Mount the router to the wall above wires door from the outside and drill some hole through the door for the cables. Network hardware failures can cause connectivity issues, slow performance, or complete network downtime. Faulty routers, switches, cables, or network interface cards (NICs) can disrupt communication, suitable to business interruptions and reduced productivity. For example, tangled patch cords, missing labels, loose slack, tight bends, and unclear cable paths can slow down routine work.

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45-degree right-angle bend on the side of the cable tray

45-degree right-angle bend on the side of the cable tray

To create a 45-degree bend, cut the side rails to remove a segment calculated by the formula (Tan (22. Learn more How to make cable tray bend / Cable tray offset formula / cable tray 45 degree bendQueries Solved in This. By applying the following formula you can quickly find the size of cut out section that you need to cut out of the side of the cable tray, or gutter-type section to make that angle. Depends on the type of cable tray, you can buy 90° tray fittings or use a speed square with a straight edge and a grinder or skill saw to cut 45° cuts. WARNING : BE CAREFUL WHEN YOU CUT TRUNKING,THIS MAY CAUSE INJURIES FROM SHARP EDGES BY CUTTING THE TRUNKING.

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Optoelectronic-integrated 3D Chip

Optoelectronic-integrated 3D Chip

Recently, an engineer team from Columbia University, Cornell University, and other institutions has successfully developed a novel three-dimensional (3D) optoelectronic chip by deeply integrating photonic technology with advanced complementary metal-oxide-semiconductor. Abstract—We demonstrate a dense, highly parallel, and scal-able multi-channel transceiver array for photonic chip-to-chip links. Advanced packaging technologies, such as 3D chiplets hetero-integration and co-packaged optics (CPO), have become crucial for further improving system performance. Currently, most solutions rely on silicon-based technologies, which alleviate some challenges but still face issues such as warpage. Here, we present a robust, chiplet-level heterogeneous integration of polymer-based circuits (CHIP), where several post-fabricated, ultrathin, polymer electronic, and optoelectronic chiplets are vertically bonded into one single chip at room temperature and then shaped into application-specific.

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