TRUMP XI SUMMIT TESTS CHIP STOCKS AND ENERGY TALKS

What tests are performed on low-voltage busbars

What tests are performed on low-voltage busbars

In practice, thermal imaging and ductor testing are used together to assess the health of busbar connections. We carry out full electrical type tests on low voltage busbars in accordance with the IEC 61439-6 Standard to ensure that the products comply with regulatory requirements. This test ensures that the insulation can resist the prescribed voltage stress without failure. IEC 61439 is a standard developed by the International Electrotechnical Commission (IEC) that covers design verification for low-voltage electrical products and assemblies.

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What tests are used for single-mode fiber optic cables

What tests are used for single-mode fiber optic cables

IEC 61280-4-5 provides test methods to measure the attenuation of installed multimode and single-mode optical fibre cabling plant as well as the determination of their polarity and length. Fiber optic testing ensures the performance and reliability of fiber optic networks. Regularly testing fiber optic cables helps minimize network downtime, lengthens the network's longevity, reduces maintenance requirements, and helps support network reconfiguration and upgrades.

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Does the optical module use a DSP chip

Does the optical module use a DSP chip

In optical modules, the DSP (Digital Signal Processor) chip serves as the core electronic processor, integrating high-speed digital signal processing, forward error correction (FEC), equalization compensation, and modulation/demodulation. The digital signal processor (DSP) is the electronic heart of coherent transmission systems. The Marvell coherent DSP portfolio, including Orion™, Canopus™ and Deneb™ platforms, empower the optical module ecosystem with low-power, high-performance silicon for QSFP-DD, OSFP and CFP2-DCO coherent pluggable form factors for AI cloud data center interconnect and 5G telecom and long-haul. However, as data rates soar beyond 100G, 400G, and now 800G, simply converting signals isn't enough.

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Ultra-high-speed optoelectronic fusion chip technology

Ultra-high-speed optoelectronic fusion chip technology

We have proposed the Fourier domain diffraction neural network, constructed the reconfigurable diffraction computing processor (DPU), developed the all-analog optoelectronic fusion computing chip ACCEL, and the large-scale general-purpose intelligent optoelectronic . Integrating microelectronics and optoelectronics can harness the mature processes and functions of microelectronics, with the ultra-wideband and low-power benefits of optoelectronics. Optical computing offers hardware acceleration for "compute-intensive + energy-sensitive" applications, including artificial intelligence, scientific computing, multimodal fusion sensing, and ultra-large-scale data exchange. Utilizing advanced thin-film lithium niobate photonic materials and a novel architecture, researchers in China have developed the first adaptive, full-band, high-speed wireless communication chip based on integrated optoelectronic fusion technology, Science and Technology Daily reported Thursday.

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Optoelectronic-integrated 3D Chip

Optoelectronic-integrated 3D Chip

Recently, an engineer team from Columbia University, Cornell University, and other institutions has successfully developed a novel three-dimensional (3D) optoelectronic chip by deeply integrating photonic technology with advanced complementary metal-oxide-semiconductor. Abstract—We demonstrate a dense, highly parallel, and scal-able multi-channel transceiver array for photonic chip-to-chip links. Advanced packaging technologies, such as 3D chiplets hetero-integration and co-packaged optics (CPO), have become crucial for further improving system performance. Currently, most solutions rely on silicon-based technologies, which alleviate some challenges but still face issues such as warpage. Here, we present a robust, chiplet-level heterogeneous integration of polymer-based circuits (CHIP), where several post-fabricated, ultrathin, polymer electronic, and optoelectronic chiplets are vertically bonded into one single chip at room temperature and then shaped into application-specific.

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